Cadence Design Systems, Inc. (NASDAQ: CDNS) is a provider of EDA and semiconductor IP. Headquartered in California, U.S., the company has a current market cap of $4.94 Billion.

Both as consumers and electronics engineers, we are in a very exciting phase right now as far as electronics are concerned. As consumers, electronics entertain us, monitor our health and lifestyle, and keep us safe. As electronics engineers, this boom has lead to a level of system-on-chip (SoC) complexity that is challenging us like never before.

Trends Driving the Industry

The big trends driving the electronics industry today are mobile connected devices, the Internet of Things (IoT), and cloud computing.

The mobility market is expected to reach $141 billion by 2018, growing at a CAGR of 10.8 percent. Consider wearables, the next frontier in mobility. Expected to be an $8 billion market by 2018 (source: MarketsandMarkets), we have barely scratched the surface in terms of applications - currently most of them are fitness and lifestyle products, but as the technology evolves the imagination is the limit to where this disruptive technology will go.

Cisco forecasts that the IoT will involve 50 billion devices by 2020. As far back as 2010, the number of things connected to the Internet exceeded the number of people on earth (source: Caveon). Google's recent acquisition of Nest, the home device company, for $3.2 billion is testament to the fact that industry giants are recognizing that the IoT is going to change the way we work, live, and play.

According to a 2012 McKinsey report, the cloud presents at $6 billion opportunity for semiconductors by 2015. Apart from wired and wireless infrastructure, the cloud will need 32-bit MCUs, optical and other sensors, discrete chips, disk drives, microcontrollers, and others.

What Do These Trends Mean to the Semiconductor Industry?

Trends like the ones discussed above are driving SoC complexity, which leads to significant design developments. Additionally, we are entering the next stage of ecosystem collaboration.

Design Developments

Let's take three big design developments - the need for good quality IP; "traditional" challenges such as low power and mixed signal; and changes in hardware architectures.

First, with increased SoC complexity comes the need for more silicon-proven, quality IP blocks. Increased functionality means more IP cores, and that causes challenges in SoC integration and verification. In his keynote address at the recently held CDNLive Silicon Valley, Cadence's annual user conference, Krishna Yarlagadda, President of Imagination Technologies Inc., said that the path to tackling system design complexity runs straight through SoC IP design and methodology, because getting differentiated systems to market in a timely manner can no longer be done from scratch. He added,"The key is to take the existing IP that's best in class and bring it together in a way that you can deliver your solution faster along with your core intellectual property".

Second, engineers still have to grapple with traditional design challenges related to low power, mixed signal, performance, area, and software. Take the power consumption concerns. A successful design flow must simultaneously consider power, performance, and area constraints in a seamless closed-loop, multi-objective planning-to-sign off solution. Power optimization techniques must combine seamlessly with advanced power switching and scaling techniques applied to power domains. But these advanced techniques can lead to component overhead and introduce new complexity to design, verification, and testability. The need of the day is a holistic solution-such as the Cadence® Low Power Solution-that manages complexity while reducing risk and increasing predictability.

Lastly, rapid technology acceleration has caused rapid changes in hardware architectures. In the IoT, for example, all of the real-world signal data coming in through all sensors must be processed before it can be stored or consumed by the processors and microcontrollers. Many of these applications are algorithm-intense with low-latency requirements, so hardware implementation is a must. The most economically viable means of accomplishing this today is to utilize high-level synthesis. Many companies are already widely deploying high-level synthesis tools, such as Cadence's C-to-Silicon Compiler.

Ecosystem Collaboration
Ecosystem collaboration has become increasingly important in the last decade, but never more so than today. Turning design into product requires collaboration with many different kinds of companies in the ecosystem, from IP to manufacturing. In the new IoT era the value is created not by the individual components but, instead, by the combination of them, from device though hub to the cloud that holds the data that is analyzed. Choosing the right ecosystem partners is crucially important.

The Indian Opportunity

We cannot foresee the electronics of tomorrow, just like we could not have imagined 15 years ago the electronics of today. What can be designed is only limited by human ingenuity. We are witnessing a time where startups are taking the front seat in driving innovation.

Considering the international market for innovative products, local entrepreneurs have a unique opportunity to make a big impact. The environment for entrepreneurship in India is ripe, with never-before access to venture funding from investors and the Government.

Cadence has been working closely with semiconductor and product startups for many years, and we have witnessed increasing startup activity, contrary to global trends. For India to make its mark on the global electronics stage, entrepreneurial activity must grow.

I want to leave you with this thought – there is a world of opportunity out there as multiple big trends drive the electronics industry to new horizons. Bleeding-edge innovation will come from startups. If you are a budding entrepreneur, this is the time to grab the opportunities out there.